AMD is preparing for a warm autumn full of news for the desktop PC market: on the one hand the Radeon RX 6000 RNDA graphics cards, on the other the new generation Ryzen processors based on Zen 3 architecture. The presentation of the Zen 3 CPUs, set for October 8, it caught everyone off guard, but at the same time it was very well received by insiders who now expect a "definitive" (or almost) overtaking over Intel and Core 10th gen series products "Comet Lake-S" announced in April.
Waiting for official details, juicy rumors arrive from the network on what could be the winning cards of the new Ryzen desktops, not too far from the current Ryzen 3000, but with some tricks that should allow AMD to offer a further improvement compared to the currently proposed on the market.
According to what has been leaked from what appears to be an internal AMD document reserved for developers, the Zen 3 CPUs will offer a substantial review of the CCD / CCX configuration as well as cache and memory support.
Zen 3 will continue to use a Multi-Chip Module (MCM) approach with 2 Core Complex Die (CCD) and one I / O die; unlike Zen 2, each CCD will be equipped with only one CCX (Core Complex) which will have a maximum of 8 cores with SMT support (16 threads), all therefore for a maximum of 16 cores / 32 threads.
As for the Cache subsystem, we will have 32MB of L3 Cache for CCX shared between the 8 cores against the 16MB of Zen 2 which, however, reaches 32MB of L3 but divided into two 16MB blocks (one for each CCX). Each Zen 3 core will also be equipped with 512KB of L2 Cache, for a maximum of 8MB L2 (4MB for CCX).
Next-generation Ryzen processors should also integrate two unified memory controllers (UMCs), each supporting one DRAM channel and two DIMMs; the capacity per channel is 512GB for a total of 1TB of supported RAM. The rest of the features (see I / O capabilities) shouldn't differ much from the current Zen 2, at least according to the current information available.